Modern integrated circuits may suffer from aging effects such as bias temperature instability (BTI) and hot carrier injection (HCl). Such aging effects may cause the behavior of transistors to degrade over time. For example, BTI will cause the threshold voltage of a transistor to change as a result of continued application of a high gate-to-source voltage on that transistor. Although this effect may be mitigated to some extent by reducing the voltage stress, this would reduce the performance of the circuit.
Integrated circuits such as programmable logic devices (PLD) often include performance critical circuits that are particularly vulnerable to aging effects. Programmable integrated circuits can be programmed by a user to implement a desired custom logic function. In particular, programmable integrated circuits include memory elements that are loaded with configuration data. These memory elements supply corresponding static control signals. The programmable integrated circuit includes programmable logic that receives the static control signals for long periods of time (e.g., static control signals having fixed polarities for six months or more).
For example, a PLD may be initially configured in a first state, with some portion of the programmable logic predominantly in one state or unused. Portions of the programmable logic that are biased to one state or are unused are especially prone to aging effects. After some time (e.g., a year or more), that PLD may be reconfigured to use the programmable logic as a clock or other delay-sensitive circuit. In this case, aged and unaged logic circuits may both be used in the same clock structure, thereby causing clock skew.
It is within this context that the embodiments herein arise.